October 1997 FDV302P Digital FET, P-Channel General Description Features-25 V, -0.12 A continuous, -0.5 A Peak.This P-Channel logic level enhancement mode field effect RDS(ON) = 13 @ VGS= -2.7 Vtransistor is produced using Fairchild's proprietary, high celldensity, DMOS technology. This very high density process is RDS(ON) = 10 @ VGS = -4.5 V.especially tailored t

October 1997 FDV302P Digital FET, P-Channel General Description Features-25 V, -0.12 A continuous, -0.5 A Peak.This P-Channel logic level enhancement mode field effect RDS(ON) = 13 @ VGS= -2.7 Vtransistor is produced using Fairchild's proprietary, high celldensity, DMOS technology. This very high density process is RDS(ON) = 10 @ VGS = -4.5 V.especially tailored t

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